/*
	IKON Corporation 2617 Western Ave. Seattle, WA 98121  (206) 728-6465

	unit structure definition file for Solaris 2.x driver
	for PCI hardcopy boards


	1 August, 1996		initial version for SPARC

	17 June, 1997		added register state save structure for power management -
				suspend and resume

				added cv for resume notification

				also added mode and timing default variables to soft state

	27 August, 1997		moved dma_handle to soft state

	15 September, 1997	added dma chaining for x86

				added dma_attr structures to soft state for data & iopbs

	7 June, 2000		made plx and ihcp basees volatile

	16 June, 2000		chucked the whole high-level interrupt thing in favor
				of a single mutex.  this to try to solve weird problems
				on some machines that caused wakeups to be missed, or
				not issued at all

				added int_line to unit struct
*/


	/************************************************************************
	*									*
	*	This driver is provided at no charge to IKON's customers	*
	*	in the hope that it will assist them in understanding and	*
	*	using IKON's PCI hardcopy interface products.  This code	*
	*	is intended to be a working and (relatively!) bug free driver	*
	*	when running on the machine and OS rev available to IKON.	*
	*	IKON will attempt to keep this code running on current OS and	*
	*	hardware from SUN - and others - but does not guarantee this.	*
	*	The user is encouraged to contact IKON with comments,		*
	*	suggestions, and BUG REPORTS.					*
	************************************************************************/




/*
	unit structure for boards
*/

struct ihcp_unit {
	dev_info_t		*dip;			/* devinfo pointer		*/
	kmutex_t		mutex;			/* mutex lock for interrupt	*/
	kcondvar_t		cv;			/* conditional variable for waits	*/
	kcondvar_t		power_cv;		/* cv for power mgmt waits		*/
	ddi_iblock_cookie_t	iblock_cookie;		/* interrupt iblock cookie		*/
	ddi_softintr_t		soft_intr_id;		/* used to identify soft int routine	*/
	volatile u_long		plx_base;		/* points at mapped plx regs	*/
	volatile u_long		ihcp_base;		/* points at mapped ihcp regs	*/
	u_long			iopb_base;		/* points at mapped iopb area	*/
	ddi_acc_handle_t	config_acc_handle;	/* config reg access handle	*/
	ddi_acc_handle_t	plx_acc_handle;		/* plx reg access handle	*/
	ddi_acc_handle_t	ihcp_acc_handle;	/* ihcp reg access handle	*/
	ddi_acc_handle_t	iopb_acc_handle;	/* iopb access handle		*/
	u_long			iopb_phys_base_addr;	/* physical iopb base address	*/
	ddi_dma_handle_t	dma_handle;		/* dma handle			*/
	ddi_dma_handle_t	iopb_handle;		/* iopb handle			*/
	ddi_dma_attr_t		dma_attr;		/* dma attr struct for user dma buffer	*/
	ddi_dma_attr_t		iopb_attr;		/* dma attr struct for iopb chain	*/
	struct buf		*buf_p ;		/* will point at buffer in use	*/
	volatile u_int		unit_open ;		/* 1 = open			*/
	volatile u_int		unit_attached ;		/* 1 = attached			*/
	u_int			mode ;			/* copy of print/plot mode	*/
	u_int			data_stream_mode;	/* copy of data streaming mode	*/
	u_int			byte_order;		/* big or little endian data flag	*/
	volatile u_long		unit_flags ;		/* our flag bits here		*/
	u_long			dma_time ;		/* dma timeout # in ticks	*/
	u_long			fifo_time ;		/* empty and <1/2 full #	*/
	u_int			saved_instance ;	/* for future ref & error logging	*/
	u_long			dev_and_vendor_id;	/* device and vendor id from config regs	*/
	u_long			revision_id;		/* revision id from config regs			*/
	u_long			saved_plx_int_cstat;	/* saved plx interrupt control/status			*/
	u_long			saved_plx_eeprom_user;	/* saved plx eeprom control & user bits (& swap in 9080)*/
	u_long			saved_mode;		/* saved mode			*/
	u_long			saved_device_control;	/* saved device control		*/
	u_long			saved_interface_control;/* saved interface control	*/
	u_long			saved_auto_ltr_low;	/* saved auto ltr reg low byte	*/
	u_long			saved_auto_ltr_high;	/* saved auto ltr reg high byte	*/
	volatile u_int		unit_suspended;		/* suspended for system power down	*/
	u_int			vers_speed_def;		/* default versatec speed selection	*/
	u_int			cent_speed_def;		/* centronics default speed selection	*/
	u_int			mode_def;		/* default print/plot mode		*/
	u_int			dma_time_def;		/* dma timeout default in seconds	*/
	u_int			rdy_time_def;		/* ready wait timeout default in secs	*/
	u_int			sg_list_length;		/* # of 16 byte entries in scatter/gather list	*/
	u_char			int_line;		/* assigned pci interrupt line	*/
	};

/*
	plx_base and ihcp_base are returned by ddi_regs_map_setup, which expects them to be
	caddr_t types

	if i declare them that way, then when i add an offset and cast to (u_long *) for the
	calls to ddi_getl and ddi_putl, lint gets upset about possible alignment problems,
	even though the result is correct, since the offsets are (so far) multiples of 4

	as long as u_long and caddr_t remain the same size and the 64 bit compiler doesn't
	change the size of caddr, this should be ok

	i want to keep the offsets as byte addresses, for readability, and because
	someday i may need to use them in ..getb or something
*/