ELF+`@@ w'@_H'! ,0 \ @Gw``*p @G@_@ _\`P\`8 `@_\`P\`8 h`@_\`P\`8 l`@_\`X\`@`@_\`X\`@ `@_\`X\`@ `@_\`X\`@ `@_\`X\`@ `@_\`P\`8@ #`,p @$`_\`X\`@@ #`,p @$`_$ @ _@ Hc'``*p @G@! ,0 \ @G〢 H``*p @G@?HC'! ,0 \ @Gw_@___t`G4 _$`_$ x__ (@ H! ,0 \ @G``*p @G@?H'_ ``*p @ _@\ (__ ( `+0 _@ H``*p @G@_@ ! ,0 \ @G?H'_!_@ H``*p @G@__\ (@_@ ! ,0 \ @G?H'_ ``*p @ _@\ _ ``*p @ _@\ _ ``*p @ _@\ _!_ 0_ ``+p @_@s H'``*p @G@__\ (@_@ _@ _@ _@ ! ,0 \ @G?H_'_@߀ H*``*p @G@__\ (@_@ _@\ 0_@ _@ _@ ! ,0 \ @G?H1'``*p @GG@_ _ 8``+p @_ P@s H*``*p @G@__\ (@_@ _@\ 0_@ _@ _@ ! ,0 \ @G?H'_ _ @``+p @_ X@s H-``*p @G@_@ P__\ (@_@ _@\ 0_@ _@ _@ ! ,0 \ @G?H'_``*p @_ `@ H0``*p @G@_@ P_@ X__\ (@_@ _@\ 0_@ _@ _@ ! ,0 \ @G?Hq'``*p @@G_G4  `+0 @?H3``*p @G@_@ `_@ P_@ X__\ (@_@ _@\ 0_@ _@ _@ ! ,0 \ @G?H''__@ H H3``*p @G@_@ `_@ P_@ X__\ (@_@ _@\ 0_@ _@ _@ ! ,0 \ @G?H'``*p @G_\ 8_\ @@_\ H@_$`_\ H @ _$```*p @G_ _ @_\ H @'_\ H @ _@ H?_ `* @'ˀ Hˀ H '``*p @G@_$a``*p @G@?_ `* @ 'ˡ4_t```*p @G@?_ `* @ 'ˡ4_t```*p @G@?_ `* @ 'ˡ4_t```*p @G@?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H @_H$a_$!_$!?_ `* @'ˀ Hˀ Hˀ Hˀ H 'ː ``*p @@G``*p @G@H_H$! _H$a _H$a _H$aˀ H, 4#``,p @D@?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_!` $`?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_!` $` _$a?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_!` $`?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_!` $` _$a?_ `* @ 'ˠ?H  'ː ``*p @@G``*p @G@ˀ H_!` $`_$ ?_ `* @ 'ˠ?H  'ː ``*p @@G``*p @G@ˀ H_ ` $`?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_ ` $`?_ `* @ 'ˠ?H  'ː ``*p @@G``*p @G@ˀ H_ ` $`_$ ?_ `* @ 'ˠ?H  'ː ``*p @@G``*p @G@ˀ H_ ` $`?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_ ` $`?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_ ` $`_$! ?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_! ` $`?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_! ` $`?_ `* @'ˠ?H 'ː ``*p @@G``*p @G@ˀ H_! ` $`@__$`| $`t@_H'``*p @G@?H 'G O O6OGw'ww@_< '``*p @<`@H8! ,0 \ @GӠwǀh_t ``*p @G@?H'_\ _t`'HG_t`H'_t ?'``*p @G@H G O OO``*p @G@GH'۱< @``*p @`* `* @ `*0 ! @ H'``*p @G@GH+' `*0 @ H'``*p @G@ `*0 @``*p @G@GH'G@w `*0 @_H'< @ `*0 @ H'``*p @G@GH' `*0 @``*p @@H'G0w'@_'! ,0 \ @<`Hw``*p @G@_@ _ pH``*p @G@_@ ?H'``*p @G@_\`P\`8@ _$`\`P\`8@ h_$`\`P\`8@ l_$`\`X@\`@_$`\`X\`@@ _$`\`X\`@@ _$`\`X\`@@ _$`\`X\`@@ _$`Ԡ $`@`He'``*p @G@_@" t%`, ! ,0  @$_@_@ `_@ P_@ X__\ (@_@ _@\ 0_@ _@ _@ ! ,0 \ @G``*p @G@H'``*p @G@?H 'G O O:OG w''w'_@\ '! ,0 \ @G۠wπh``*p @G@ H'_ t H``*p @G@ H'G H``*p @G@ H'_@ _ ؀H _ϐ _@ _ ؀O_ p H``*p @G@ HZ'ߦ _@" p)Ш"@@_\`Lt`@_\`Lt`@_\`Lt``$``$`a$`a$`\`X\`@a @_\`X\`@ a@_\`P\`8 a@_\`X@\`@#`,p @$`_\`P\`8@ l#`,p @$`_$ |``*p @G@_@ GH'G w''w! ,0 \ @_< @@w׀h ``*p @@ H'_@ @x__$ p@ ``*p @_ @H'Gwww'@_'! ,0 \ @GϠw׀h``*p @G@ Ho'``*p @G@_ |!1# @_$`|_ |!@_$`|_\ w `*0 _ @ `+0 _@'__t`_ |!@H  '``*p @G@_ |!@H  '``*p @G@_ |!@H  '``*p @G@``*p @G@GH'Gwww'@_'! ,0 \ @GϠw׀h``*p @G@ Hp'``*p @G@_ |!1# @_$`|_ |!? @_$`|_\ w `*0 _! `+0 _@'__t`_ |!@H  '``*p @G@_ |!@H  '``*p @G@_ |!@H  '``*p @G@``*p @G@GH'G㾐w'w'ww'@_'! ,0 \ @Gwh``*p @G@ H'``*p @GG@_@ G4 !? @'_ @``*p @G_@H``*p @G@ ' H ' H ' H ' H '!@H @'_\ X_\ @ @ H_\`P\`8 @@ ?@@H_\`P\`8 @@ @@@_\`X@\`@#`,p @$`_\`P\`8@ l#`,p @H$```*p @G@_\`X\`@@ _\`X\`@@ #`,p @H$```*p @G@ _H$```*p @G@ _H$```*p @G@ H;'_\ X_\ @@  @HG dH @G '_\ X_\ @@  @HG dO_\ X_\ @@  @H``*p @G@ H'' H ' H ' H ' H ' H '_\ X_\ @ @_\ X_@\ @#`,p @$`' @H @' H '_\`X\`@ @_\`X\`@@ #`,p @HC$```*p @G@' H ' H ' H ' H ' H '_H$```*p @G@' H ' H ' H ' H ' H '_H$```*p @G@ H '"XH"X'4А"@@L@_Ht```*p @G@ H '"XH"X'4А"@@L@_Ht```*p @G@ H '"XH"X'4А"@@L@_Ht```*p @G@_ |!1# @_$`|_\ X_\ @@  @H``*p @G@_\`X\`@ @ @_\`X@\`@#`,p @HL$`_ |!@_@$`|w_\ X_\ @_\ X_@\ @ @@@_\ X_\ @@ #`,p @$`_\ P_\ 8 h@)_\ P_\ 8@ #`,p @$```*p @G__\ @_ _ __\ @@w_\ X_\ @_\ X_@\ @ ?@@_\ X_\ @@ #`,p @$`_\ P_\ 8 h@_\ P_\ 8@ #`,p @$`_ h``*p @G@_ |!@$ H'_ h``*p @G@_ |!@$ H'_\`X\`@ @ @_\`X@\`@#`,p @H$```*p @G@_ |!1# @_$`|_\ X_\ @@  H ``*p @G@H_ |!@_@$`|w_\ X_\ @_\ X_@\ @ @@_\ X_\ @@ #`,p @$`_\ P_\ 8 h@)_\ P_\ 8@ #`,p @$```*p @G__\ @_ _ __\ @@w_\ X_\ @_\ X_@\ @ ??@@_\ X_\ @@ #`,p @$`_\ P_\ 8 h@_\ P_\ 8@ #`,p @$`_ h``*p @G@_ |!@@$ H'_ h``*p @G@_ |!@$ H'_\ X_\ @@  @H'_\ X_\ @@  H``*p @G@_\`X\`@ @ @_\`X@\`@#`,p @$`_\`X\`@ @ _\`X\`@@ #`,p @H$```*p @G@'_\ X_\ @@ ' H ' @H @' H '_\ X_\ @@ ' H ' @H ' @'_ @H<``*p @G@_\`X\`@@  , _\`X\`@@  , _\`X\`@@  '_ @H``*p @G@_`'G`'K\`P\`8@ h'O_\`P\`8@ l'S_\`X\`@@!'W_\`X\`@@!'[_\`X\`@@!'__\`X\`@@! 'c_\`X\`@@!$'g_\`X\`@@!('k_\`X@\`@ 'o_\`X\`@@  's_\`X\`@@  'w_\`X\`@@  '{_\`X\`@@  '_\`X\`@@  '_\`X\`@@  '_\`X\`@@  '_\`X\`@ @ _\`X@\`@#`,p @$`_\`X\`@ @ _\`X\`@@ #`,p @$`_\`X\`@@ @!?# @'G_ L@Hb``*p @G_ |@_ |'_ @HM``*p @G@_\`X@\`@) `-0 % _\`X\`@ @ _\`X\`@@ +``-p @%`_\`X\`@ @@ _\`X\`@@ % _\`X\`@ @ `_\`X\`@@ H%```*p @G@_\`X@\`@) `-0 % _\`X\`@ @ _\`X\`@@ #`,p @$`_\`X\`@ @  _\`X\`@@ % _\`X\`@@ @!?# @'_ @H``*p @G@#?cH``*p @G@ H'_\`X\`@ @4 _\`X\`@ @4 _\`X\`@ @_\`X@\`@#`,p @H$```*p @G@_ |! ? @Ho$``*p @G@_ |! @H_$``*p @G@_\`X\`@ @ _\`X@\`@#`,p @$`_\`X\`@@@ ?ߐ@@_\`X\`@@@ @@_\`X\`@@@ @@_\`X\`@@ #`,p @H$```*p @G@_\`X\`@ @ _\`X@\`@#`,p @$`_\`X\`@@@ ?ߐ@@_\`X\`@@@ ?@@_\`X\`@@@ @@_\`X\`@@ #`,p @H$```*p @G@_\ X_\ @_\ X_@\ @ ?@@_\ X_\ @@ #`,p @$`_\ X_\ @ @ ! ,0  _\ X_\ @@ @#`,p @$`_\ X_\ @@  H``*p @G@_ |!@$_\ X_\ @@  H``*p @G@_ |!@$_\`P\`8 h@_\`P\`8@ #`,p @$`_\`X\`@!(@_\`X\`@@ #`,p @H9$```*p @G@_ '_ @H&``*p @G@_ '_ @H``*p @G@_\`X\`@ @_\`X@\`@#`,p @H$```*p @G@_\`X\`@@  '_ @H``*p @G@_\`X\`@@  '_ @H``*p @G@@_H H'<#`HF<#|H!<$ O, 4#``,p @D@<#|H#|OA#|OO<#` H #|OiO#` O#` OO<#` H"<#`H! $ O, 4#``,p @D@#`OO<#`H! $ O, 4#``,p @D@<#`H<#`H #`OOb#`O#`OOV#`O#`O'OJ_@ GH'G˰ݐH߸(p44(HhL  w''_w@ _$ x_\ X_\ @@ '۠!H! @H!@H 'נ 'Ӧ _$`x\`X\`@ @_\`X\`@@@ ??@@_\`X\`@@ #`,p @$`_ |!< @H'_\ hw_ |! @H _\`X\`@@@ ?ߐ@@_\ X_\ @@ #`,p @$`_D @H_\`X\`@!(@_\ X_\ @@!(! @H_\ X_\ @@  H_\`X\`@ @ @_\`X@\`@#`,p @$`_ |!@H_\`X\`@ @ _\`X@\`@#`,p @$`_ |!# @H+$_ |!? @H#$_ |!? @H$ϡ<#H #|Or#OH #O#Od_@ GӀH_@\ 0H'0w''_w``*p @_ @_@ _ xH_$ x 'ߠ '_@ G߀H``*p @_ @_@ _@ _@ H'w_@\ '! ,0 \ @Gw``*p @G@_@ __t`h_\ 0! ,0 \ h_\ 0 h``*p @G@_D` $`D H$_D @H H' '_\ `_ ǠÖ@s H_D` $`D $``*p @G@HoÀ H_D` $`D $``*p @G@HU``*p @G_@ˠ H_Ϡ h_D` $`D $``*p @G@H._ |! @H_\`X\`@ @ _\ X_@\ @#`,p @$`_ |! @H``*p @G_\ 040$ @_\ 040$ 4 < '#?cH``*p @G@_D` $`D H$_\ X_\ @ @4 _\ X_\ @ @4 _\ X_\ @ @_\ X_\ @_\ X_@\ @ ?ϐ@@_D @H3``*p @G@_\`X\`@@ ? P_ @@_\`X\`@ @ _\`X@\`@#`,p @$`_ |!<@H1$``*p @G@_\`X\`@@ ? _ @@_\`X\`@ @ _\`X@\`@#`,p @$`_ |!@$_\`X\`@@@ @@_\`X\`@@ #`,p @H($```*p @G@_|!<@$\X\@@@ @@@_\`X\`@@ #`,p @$`_ |! @Hp'_\ X_\ @@  @HG dH @G '_\ X_\ @@  @HG dO_\ X_\ @@  @H+``*p @G@_\`X\`@@@ ?@@_\`X\`@@ #`,p @$`_D` $`D H$_D @H_\`X\`@ `@ _\`X@\`@#`,p @$`@w_D @H H''_ |! @H_D @H``*p @G@$'!H '``*p @G@''#``,p @G_\ X_@\ @@@_\ X_\ @!(@(_\ X_@\ @#`,p @$`_\ X_\ @! _ϕ4 :@_\ X_\ @!@_\ X_\ @!@ @_\ X_\ @!!!@@_\ X_\ @!$@_\ X_\ @@ #`,p @$`_\ X_\ @!(@#! ,0  _\ X_\ @@ @#`,p @$`_\ P_\ 8 h!B!@@_\ P_\ 8@ #`,p @$`_ |! @H_D @H _\`X\`@ `@ _\ X_@\ @#`,p @$`#``,p @G_ |_\ X_\ @@!_\ P_\ 8@ h@@@``*p @G__\ @_ _ __\ @@w_ |! @H _\`X\`@@@ ?ߐ@@_\ X_\ @_\ X_@\ @ ??@@_\ X_\ @@ #`,p @$`_\ P_\ 8 h@_\ P_\ 8@ #`,p @$`_\ X_\ @@!(! @H``*p @G@_\ X_\ @!(@$_\ X_@\ @#`,p @$` @_\ X_@\ @ ?'_\ X_\ @@ '_\ X_\ @ @ _\ X_\ @@ #`,p @$` @_\ X_\ @ @ _\ X_\ @@ #`,p @$`_\ X_\ @@_\ X_\ @ @! ,0  _\ X_\ @@ @#`,p @$`_\ X_\ @@!(! @H``*p @G@_D` $`D H$_\ X_\ @!(@(_\ X_@\ @#`,p @$`_ h\_ h``*p @G@_ |!@$_D` $`D H$``*p @G@_ |!@$_D` $`D $_\`X@\`@'_\`X\`@@ '@k__\`X\`@@_\`X\`@ @_\`X\`@@ #`,p @H;$`_ |! @H4_\ X_\ @@  H``*p @G@_ |!@$_\ X_\ @@  H``*p @G@_ |!@$_@\ `_@r P_@ H'G@w_\ _@ H H``*p @_ @_\ H <@/_\`P\`8 l@!@@_\`P\`8 l@!? @@_\`P\`8@ h) `-0 % _\`P\`8 l@!@@a"@@_\`P\`8 l@!? @@_\ H <@_@ H``*p @_ @_\`P\`8 h@_\`P\`8@ % _\`P\`8 a@_\`P\`8@ l#`,p @$`0w_@\ '! ,0 \ @Gw``*p @G_\ 0@_!H``*p @G@@_``*p @G_\ 0@``*p @G@_\ 0# h_\ 0H# @_ 0t```*p @G\`@idr_attach: instance %d: restoring state & clearing suspended flag idr_attach: instance %d: command is DDI_ATTACH idr_attach: instance %d: ddi_soft_state_zalloc failure! idr_attach: instance %d: ddi_get_iblock_cookie (high level) error! idr_attach: instance %d: ddi_add_intr (high level) error! idr_attach: instance %d: ddi_get_iblock_cookie error! idr_attach: instance %d: ddi_add_softintr error! idr_attach: instance %d: ddi_dev_nregs error! idr_attach: instance %d: nregs = 0x%x idr_attach: instance %d: ddi_regs_map_setup error! idr_attach: instance %d: ddi_regs_map_setup error! idr_attach: instance %d: ddi_dma_alloc_handle failure! idr%didr_attach: instance %d: ddi_create_minor_node error! idr_attach: instance %d: pci_config_setup error! idr_attach: instance %d: ints registered, node created, regs mapped, plx_base = 0x%x, idr_base = 0x%x idr_attach: instance %d: vendor & device id = 0x%08x, revision id = 0x%02x idr_attach: instance %d: ignore_minphys property out of range! idr_attach: instance %d: ignore_minphys = 0x%x idr_attach: instance %d: dma_time_def = %d idr_attach: instance %d: rdy_time_def = %d idr_attach: instance %d: attn_time_def = %d idr_attach: instance %d: byte_swap_def property out of range! idr_attach: instance %d: byte_swap_def = %d idr_attach: instance %d: speed_def property out of range! idr_attach: instance %d: speed_def = %d idr_attach: instance %d: cycle_pol_def property out of range! idr_attach: instance %d: cycle_pol_def = %d idr_attach: instance %d: busy_pol_def property out of range! idr_attach: instance %d: busy_pol_def = %d idr_attach: instance %d: read_cycle_def property out of range! idr_attach: instance %d: read_cycle_def = %d idr_attach: instance %d: read_acf2_def property out of range! idr_attach: instance %d: read_acf2_def = %d idr_attach: instance %d: write_cycle_def property out of range! idr_attach: instance %d: write_cycle_def = %d idr_attach: instance %d: read_f3_def property out of range! idr_attach: instance %d: read_f3_def = %d idr_attach: instance %d: read_f2_def property out of range! idr_attach: instance %d: read_f2_def = %d idr_attach: instance %d: read_f1_def property out of range! idr_attach: instance %d: read_f1_def = %d idr_attach: instance %d: write_f3_def property out of range! idr_attach: instance %d: write_f3_def = %d idr_attach: instance %d: write_f2_def property out of range! idr_attach: instance %d: write_f2_def = %d idr_attach: instance %d: write_f1_def property out of range! idr_attach: instance %d: write_f1_def = %d idr_attach: instance %d: open_f3_def property out of range! idr_attach: instance %d: open_f3_def = %d idr_attach: instance %d: open_f2_def property out of range! idr_attach: instance %d: open_f2_def = %d idr_attach: instance %d: open_f1_def property out of range! idr_attach: instance %d: open_f1_def = %d idr_attach: instance %d: unrecognized command idr_getinfo: instance %d: entering idr_getinfo idr_getinfo: instance %d: null unit_pointer! idr_getinfo: instance %d: unrecognized info_command! idr_getinfo: instance %d: leaving idr_getinfo idr (_init): compiled %s, %s idr (_init): _init error!, error # = 0x%x idr (_init): mod_install error! error # = 0x%x idr (_init): _init done, return value = 0x%x idr (_fini): mod_remove error! error # = 0x%x idr (_fini): _fini done idr_detach: instance %d: command is DDI_SUSPEND idr_attach: instance %d: unit open, returning DDI_FAILURE idr_detach: instance %d: saving state & setting suspended flag idr_detach: instance %d: command is DDI_DETACH idr_detach: instance %d: detach complete idr_detach: instance %d: unrecognized command! idr_open: instance %d: null unit pointer! idr open: instance %d: open attempted before attach complete! idr_open: instance %d: wrong open_type! idr_open: instance %d: open called when already open! idr_open: instance %d: open complete idr_close: null unit pointer! idr_close: instance %d: close complete idr_read: instance: %d: unit_pointer null! idr_read: instance %d: entering read routine idr_read: instance %d: DMA timeout! idr_read: instance %d: Multicycle error! idr_read: instance %d: signal received! idr_read: instance %d: leaving read routine idr_write: instance %d: unit pointer NULL! idr_write: instance %d: entering write routine idr_write: instance %d: DMA timeout! idr_write: instance %d: Multicycle error! idr_write: instance %d: signal received! idr_write: instance %d: leaving write routine ir_ioctl: instance %d: unit_pointer NULL! idr_ioctl: instance %d: entering ioctl routine, command = 0x%x idr_ioctl: instance %d: arg = %p, *arg = 0x%x idr_ioctl: instance %d: at set mode idr_ioctl: instance %d: at immediate funtion idr_ioctl: instance %d: at read function idr_ioctl: instance %d: at write function idr_ioctl: instance %d: at immediate pulse idr_ioctl: instance %d at IMM_PULSE: attempt to issue GO while ATTENTION true! idr_ioctl: instance %d: at read pulse idr_ioctl: instance %d: at write pulse idr_ioctl: instance %d: at set dma time idr_ioctl: instance %d: at set attn time idr_ioctl: instance %d: at set rdy time idr_ioctl: instance %d: at attn wait idr_ioctl: instance %d: at attn wait, attf already set, returning w/out waiting idr_ioctl: instance %d: at attn wait, time_now = %d, unit_p->attn_time = %d idr_ioctl: instance %d: timeout waiting for attention! idr_ioctl: instance %d: signal while waiting for attention! idr_ioctl: instance %d: at ready wait idr_ioctl: instance %d: at ready wait - ready already set idr_ioctl: instance %d: at ready wait, time_now = %d, unit_p->rdy_time = %d idr_ioctl: instance %d: timeout waiting for ready! idr_ioctl: instance %d: signal while waiting for ready! idr_ioctl: instance %d: at ready wait - attf w/out eorf idr_ioctl: instance %d: at get status idr_ioctl: instance %d: at get range idr_ioctl: instance %d: at get regs idr_ioctl: instance %d: at get flags, flags = 0x%x idr_ioctl: instance %d: at data out, data = 0x%x idr_ioctl: instance %d: at data in idr_ioctl: instance %d: at set range, range = 0x%x idr_ioctl: instance %d at SET_RANGE - range count too big! idr_ioctl: instance %d: at idr auto idr_ioctl: instance %d: at idr manual idr_ioctl: instance %d: at start read idr_ioctl: instance %d: at start write idr_ioctl: instance %d: at block end idr_ioctl: instance %d: at BLOCK_END, parity error! idr_ioctl: instance %d: at BLOCK_END, multi-cycle error! idr_ioctl: instance %d: at dev and vend id idr_ioctl: instance %d: at revision id idr_ioctl: instance %d: at set new mode idr_ioctl: instance %d: at get new status idr_ioctl: instance %d: at get new flags idr_ioctl: instance %d: at master clear idr_soft_intr: instance %d: entering soft_intr idr_soft_intr: instance %d: sending signal idr_strategy: instance %d: entering strategy idr_strategy: instance %d: DMA byte count zero or too large! idr_strategy: instance %d: ddi_dma_buf_bind_handle failure! idr_strategy: instance %d: too many dma cookies! idr_strategy: instance %d: dmac_address = 0x%x, dmac_size = 0x%x idr_strategy: instance %d: buffer not word aligned or odd byte count! idr_strategy: instance %d: auto mode, setting range counter to 0x%x (words - 1) idr_strategy: instance %d DR11 range count too large! idr_strategy: instance %d: auto read mode, setting dvma_wait idr_strategy: instance %d: auto write mode, setting eor_wait idr_strategy: instance %d: manual mode, setting dvma_wait idr_strategy: instance %d attempt to issue GO while ATTENTION true! idr_strategy: instance %d: manual read/write or auto read, enabling dma done interrupt idr_strategy: instance %d: auto write, disabling dma done interrupt idr_strategy: instance %d: starting dma, latched fcn reg = 0x%x idr_strategy: instance %d: unit_flags = 0x%x, dma mode = 0x%x, int cstat = 0x%x idr_strategy: instance %d: calling cv_timedwait_sig, time_now = %d, dma_time = %d idr_strategy: instance %d: dma not done after cv_timedwait_sig idr_strategy: instance %d: dma not done after abort! idr_strategy: instance %d: signal received while waiting for interrupt! idr_strategy: instance %d: timeout while waiting for interrupt! idr_strategy: instance %d: parity error! idr_strategy: instance %d: multi-cycle error! idr_attach: instance %d: soft_reset: pci_config_setup error! idr_??? (plx_soft_reset): instance %d: soft reset and configuration reload complete idr_minphys: instance %d: bp->b_bcount = 0x%x idr_minphys: instance %d: calling system minphys idr_minphys: instance %d: bp->b_bcount = 0x%x idr_minphys: instance %d: setting bp->b_count to min(b_bcount,IDR_MAXPHYS) idr_minphys: instance %d: bp->b_bcount = 0x%x idr high mutexidr soft mutexidr cvidr power cvddi_pseudoignore_minphysdma_time_defrdy_time_defattn_time_defbyte_swap_defspeed_defcycle_pol_defbusy_pol_defread_cycle_defread_acf2_defwrite_cycle_defread_f3_defread_f2_defread_f1_defwrite_f3_defwrite_f2_defwrite_f1_defopen_f3_defopen_f2_defopen_f1_def10:00:04May 21 2004Tahoma Tech DR11-W 2004.05.21.0942      &P/:#(C&M'LV*HP`,#pj Pr~d |pX@ PTiPhUkp'<CYak'4HSl@rzPp /CQ_o{i /6JU=0emuidr.debug.64idr_driver.cslave_attrdma_attridr_cb_opsidr_openidr_closeidr_readidr_writeidr_ioctlidr_opsidr_getinfoidr_attachidr_detachmodldrvmodlinkagestate_headread_dump_0read_dump_1idr_high_intridr_soft_intrplx_soft_resetidr_strategyidr_minphysddi_remove_intrgetminorddi_trigger_softintrphysioddi_dma_unbind_handlebiodoneddi_get32ddi_dma_free_handleddi_remove_minor_nodeddi_add_softintrdrv_usecwaitcv_signalddi_dma_alloc_handlecv_destroymutex_enterddi_report_devnulldevdelaymutex_destroyddi_regs_map_setupddi_add_intrddi_soft_state_freemutex_exitddi_soft_state_zallocmod_infosprintfmod_installpci_config_teardownddi_dev_nregscopyoutcv_initddi_set_driver_privateddi_remove_softintrcv_broadcastnodevddi_get_soft_stateddi_getpropnochpollpci_config_setupddi_soft_state_finiddi_get_lboltmod_driveropspci_config_put8ddi_prop_opddi_get_soft_iblock_cookieddi_get_iblock_cookiepci_config_put32ddi_put32drv_usectohzddi_create_minor_nodeddi_get_instanceddi_regs_map_freepci_config_get32cv_timedwait_sigcopyinddi_soft_state_initmod_removepci_config_get8cmn_errcv_waitddi_dma_buf_bind_handlemutex_init<C4@(#)types.h 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