/* IKON Corporation 2617 Western Ave Seattle, WA 98121 (206) 728-6465 ioctl definition file for Solaris 2.0 driver for Sbus DR11-W emulator model 10103 21 October, 1992 BETA release */ /************************************************************************ * * * This driver is provided at no charge to IKON's customers * * in the hope that it will assist them in understanding and * * using IKON's Sbus hardcopy interface products. This code * * is intended to be a working and (relatively!) bug free driver * * when running on the machine and OS rev available to IKON. * * IKON will attempt to keep this code running on current OS and * * hardware from SUN - and others - but does not guarantee this. * * The user is encouraged to contact IKON with comments, * * suggestions, and BUG REPORTS. * ************************************************************************/ /* this file is to be #include(d) in the program that calls the 10103 driver. it is also used internally by the driver - don't modify this unless you know what you are doing!!!! including this file in the calling program will also cause idr_reg.h to be included. the idr_reg.h file provides the regsiter bit definitions to be used with some of the ioctl commands defined in idr_io.h see the idr_reg.h file for bit definitions and descriptions */ #ifndef _IDR_IO_H #define _IDR_IO_H #endif /* pick up register definitions and ioctl macros for use by calling program */ #ifndef _IDR_REG_H #include "./idr_reg.h" #endif #ifndef _SYS_IOCCOM_H #include #endif #ifndef TRUE #define TRUE 1 #define FALSE 0 #endif #ifndef OK #define OK 0 #endif /* the ioctl() function call looks like: ioctl(filedescriptor,command,argument) argument is used in some of the idr ioctl calls to provide values to the driver ioctl routine, or return values to the calling program. the argument is restricted to a maximum of 255 bytes - by unix, and by the driver. the following ioctl commands are available to programs using the idr driver: IDRIO_SET_MODE sets the mode register bits and the RDIS bit in the latched functions register IDRIO_IMM_FCN sets the function bits immediately IRDIO_READ_FCN sets the function bits before each block read IDRIO_WRITE_FCN sets the function bits before each block write IDRIO_IMM_PULSE issues pulse commands immediately IDRIO_READ_PULSE issues pulse commands at each block read IDRIO_WRITE_PULSE issues pulse commands at each block write IDRIO_SET_DMA_TIME sets dma timeout value IDRIO_SET_ATTN_TIME sets wait for attention timeout value IDRIO_SET_RDY_TIME sets wait for ready timeout value IDRIO_ATTN_WAIT waits for attention 0-to-1 transition IDRIO_RDY_WAIT waits for READY IDRIO_GET_STATUS gets flags/status register IDRIO_GET_RANGE gets range counter value IDRIO_GET_REGS gets all registers including DMA chip's note that latch reg bit DMIN is forced to 1 by this ioctl(to allow reading data in reg) IDRIO_GET_FLAGS returns various driver flag and error bits IDRIO_DATA_OUT writes 16 bits to DR11 output latches IDRIO_DATA_IN reads 16 bits from DR11 input latches IDRIO_SET_RANGE sets DR11 range counter in manual mode IDRIO_AUTO selects auto mode (default). auto mode causes DR11 range & controls to be set up for each read/write call at same time as DVMA logic is set up. DVMA and DR11 blocks are set to the same size, and a single DVMA block is used per DR11 block. in auto mode, all that is necessary to do dma transfers is read or write calls. IDRIO_MANUAL selects manual mode. manual mode causes read/write calls to set up DVMA controller only. DR11 range and controls must be set up explicitly by calling pgm. manual mode allows multiple read/write calls per DR11 block, or disabling the DR11 range counter and doing continuous transfers. IDRIO_START_READ IDRIO_START_WRITE in manual mode, enables overall block-issued before DR11 logic is enabled with GO command. and before the first unix read or write call. IDRIO_BLOCK_END in manual mode, disables overall block transfer-issued after all DR11 transfers are complete, typically after a wait for ready has returned successfully. */ /* the ioctl command codes conform to the unix pattern: the top 3 bits of the 32 bit value indicate whether arguments are to be copied in, copied out, both, or neither. 0x80000000 = copy in 0x40000000 = copy out 0x20000000 = no argument transfer 0xC0000000 = copy in and out the number of bytes in the argument is encoded in the lower 8 bits of the upper half of the u_int, and the actual command is encoded in the lower half. a rather arbitrary character, which is intended to identify the driver, is also encoded in the lower half of the command. it becomes part of the command value. for all commands the arg length is part of the command value. commands which require arguments - in or out - will pass those arguments as unsigned integers. the magic character that identifies this driver is hereby (arbitrarily) chosen to be 'D'. the following ioctl commands are defined using pre-existing ioctl command macros. the CMD_MASK and COUNT_MASK values defined MUST match the usage in ioccom.h. refer to that include file for further information. */ #define IDRIO_CMD_MASK 0xE000FFFF /* cmd in top 3 and bottom 16 bits */ #define IDRIO_COUNT_MASK 0x00FF0000 /* arg byte count here */ /* THE SOLARIS 2.0 MACROS IN ioccom.h WANT THE "MAGIC LETTER' QUOTED. THE SOLARIS 1.X MACROS WANTED IT WITHOUT QUOTES SOME VERSIONS OF ioccom.h DIDN`T INCLUDE _IORN AND _IOWN. SOL2 SEEMS TO HAVE THEM */ #define IDRIO_SET_MODE _IOW('D',1,int) /* set mode reg bits & RDIS in latched reg */ #define IDRIO_IMM_FCN _IOW('D',2,int) /* set function bits NOW - immediate write to fcn bits */ #define IDRIO_READ_FCN _IOW('D',3,int) /* set fcn bits at read start - fcn write deferred until*/ /* following (and all later) read calls */ #define IDRIO_WRITE_FCN _IOW('D',4,int) /* set fcn bits at write time - as in read_fcn above */ #define IDRIO_IMM_PULSE _IOW('D',5,int) /* issue pulses NOW - immediate write to pulse reg */ #define IDRIO_READ_PULSE _IOW('D',6,int) /* issue pulses at read start - pulses deferred until */ /* next(and later) read calls */ #define IDRIO_WRITE_PULSE _IOW('D',7,int) /* issue pulses at write time - as in read_pulse above */ #define IDRIO_SET_DMA_TIME _IOW('D',8,int) /* DVMA block timeout in secs*/ /* also controls EOR timeout */ /* in auto mode. manual eor */ /* wait uses RDY_TIME */ #define IDRIO_SET_ATTN_TIME _IOW('D',9,int) /* ATTENTION wait timeout # */ #define IDRIO_SET_RDY_TIME _IOW('D',10,int) /* READY wait timeout in secs*/ #define IDRIO_ATTN_WAIT _IO('D',11) /* wait for ATTENTION flag */ #define IDRIO_RDY_WAIT _IO('D',12) /* wait for DR11 READY */ #define IDRIO_GET_STATUS _IOR('D',13,int) /* returns DR11 status reg */ #define IDRIO_GET_RANGE _IOR('D',14,int) /* returns DR11 range reg */ /* gets actual bits which */ /* are initially set to the*/ /* WORD count minus 1 !!! */ /* and decrement per DR11 */ /* transfer (16 bit words) */ #define IDRIO_GET_REGS _IORN('D',15,44) /* puts all regs in arg */ /* returns all board registers. DMAIO registers are all 32 bits wide. DR11 registers are 8 bits wide. each is returned in a 32 bit longword in the following order: (u_long larg[11]) larg[0] = DMAIO CSR larg[1] = DMAIO ADD larg[2] = DMAIO RANGE larg[3] = DR11 MODE larg[4] = DR11 LATCHED FUNCTIONS larg[5] = DR11 FLAGS/STATUS larg[6] = DR11 DATA HIGH larg[7] = DR11 DATA LOW larg[8] = DR11 RANGE HIGH (4 bits pre FPGA3) larg[9] = DR11 RANGE MID larg[10] = DR11 RANGE LOW */ #define IDRIO_GET_FLAGS _IOR('D',16,int) /* returns driver unit_flags */ #define IDR_DVMA_WAIT 0x80000000 /* waiting for t/c */ #define IDR_EOR_WAIT 0x40000000 /* waiting for EOR */ #define IDR_ATTN_WAIT 0x20000000 /* waiting for attention*/ #define IDR_RDY_WAIT 0x10000000 /* waiting for ready */ #define IDR_DVMA_TIMEOUT 0x08000000 /* dma wait timed out */ #define IDR_EOR_TIMEOUT 0x04000000 /* eor wait timeout */ #define IDR_ATTN_TIMEOUT 0x02000000 /* attn timeout */ #define IDR_RDY_TIMEOUT 0x01000000 /* ready wait timeout */ #define IDR_MANUAL 0x00800000 /* manual mode */ #define IDR_INPUT 0x00400000 /* used w/waiting-for */ /* indicates xfer dir */ #define IDR_MCYL_ERR 0x00200000 /* multicycle error */ #define IDR_SIG_RECEIVED 0x00100000 /* sleep term'd by signal*/ #define IDR_CLEAR_FLAGS ~(IDR_DVMA_WAIT|IDR_EOR_WAIT|IDR_ATTN_WAIT|\ IDR_RDY_WAIT|IDR_DVMA_TIMEOUT|IDR_EOR_TIMEOUT|IDR_ATTN_TIMEOUT|IDR_RDY_TIMEOUT\ |IDR_MCYL_ERR|IDR_SIG_RECEIVED) /* idr_clear_flags used to reset the above flags (INSIDE DRIVER ONLY!!!!!!) */ #define IDRIO_DATA_OUT _IOW('D',17,int) /* 16 bits to DR11 output reg*/ #define IDRIO_DATA_IN _IOR('D',18,int) /* reads DR11 input reg */ #define IDRIO_SET_RANGE _IOW('D',19,int) /* sets DR11 range reg */ /* int is WORD count-1 */ /* it is the actual value*/ /* to be plugged into the */ /* range register!!!!!! */ #define IDRIO_AUTO _IO('D',20) /* selects manual mode */ /* auto is driver default */ #define IDRIO_MANUAL _IO('D',21) /* selects manual mode */ /* manual requires direct */ /* control of DR11 range and */ /* block start and end */ #define IDRIO_START_READ _IO('D',22) /* enables overall block xfer*/ /* manual mode only! */ #define IDRIO_START_WRITE _IO('D',23) /* enables write block xfer */ #define IDRIO_BLOCK_END _IO('D',24) /* disables block xfer(ends) */ /* manual mode only */ /* start read or write enables the DR11 control logic. block end disables it */ /* start read or write should be issued before the first unix read or write */ /* call in manual mode. these ioctls do not issue a go or cycle pulse, that */ /* must be done by the calling program AFTER the start ioctl. */ /* define various flags and constants */ #define DMA_TIME_DEF 30 /* dma time-out default seconds */ #define ATTN_TIME_DEF 30 /* fifo empty and <1/2 full time-out*/ #define RDY_TIME_DEF 30 /* ready wait time default */ #define DMA_TIME_MAX 600 /* protect against hanging if */ #define ATTN_TIME_MAX 600 /* if caller asks for giant # */ #define RDY_TIME_MAX 600 #define DMA_TIME_MIN 10 /* try to prevent timeout during*/ #define ATTN_TIME_MIN 10 /* active dma or legit wait */ #define RDY_TIME_MIN 10 #define MODE_REG_DEF 0 /* sets mode reg at init time */ #define LATCH_REG_DEF 0 /* sets latch reg at init time */ #define READ_FCN_DEF (IDR_FCN1 | IDR_FCN3) /* link mode default */ #define READ_PULSE_DEF IDR_GO /* go only on read - no aclof2 */ /* not quite link mode default */ #define WRITE_FCN_DEF IDR_FCN3 /* link style out mode */ #define WRITE_PULSE_DEF (IDR_CYCL | IDR_GO) /* link style force cycl*/