/* ihcp_var.h hp-ux driver for pci hardcopy board - model 10117 soft state structure definition Ikon Corporation 2617 Western Avenue Seattle, WA USA 98121 phone: 206.728.6465 fax: 206.728.1633 www: http://www.launchsite.com/ikon */ /* THIS CODE IS OFFERED TO IKON'S CUSTOMERS AT NO CHARGE, WITH THE INTENT THAT IT BE USED WITH IKON'S BOARD LEVEL PRODUCTS. WHILE IKON INTENDS TO KEEP THE DRIVER CURRENT WITH HP'S HARDWARE AND OPERATING SYSTEMS, AND TO KEEP THE CODE AS BUG FREE AS POSSIBLE, THIS IS NOT GUARANTEED. 10 November, 1997 initial coding strategy uses a combination of p-i/o for leading & trailing bytes, and dma for long word blocks dma chaining is supported 8 June, 1999 port to 11x: make 64 bit safe make defaults tunable, not compile time defaults 4 November, 1999 add structure definition for isc pointer linked list */ /* unit structure for boards */ typedef struct { int slot; /* our slot # - used in debug printfs */ struct isc_table_type *isc_p; /* saved ics ptr for future reference */ caddr_t plx_mapped_base; /* points at mapped plx regs */ caddr_t ihcp_mapped_base; /* points at mapped ihcp regs */ struct iovec *pci_iov_p; /* points to mem allocated for pci iovs */ struct iovec dma_iov; /* pci iovec of dma list - here for unload code */ caddr_t iopb_mem_base; /* ptr to total mem malloc'd for iopb list */ caddr_t iopb_base; /* virtual address of io control blocks*/ uint32_t iopb_phys_base_addr; /* pci address of io control blocks */ lock_t *spinlock; /* pointer for use in spinlocking */ int sleepevent; /* used by get_sleep_lock and sleep */ struct buf *buf_p; /* will point at buffer in use */ volatile u_int unit_open; /* 1 = open */ volatile u_int unit_attached; /* 1 = attached */ uint32_t mode; /* copy of print/plot mode */ uint32_t data_stream_mode; /* copy of data streaming mode */ uint32_t byte_order; /* big or little endian data flag */ volatile uint32_t unit_flags; /* our flag bits here */ uint32_t dma_time; /* dma timeout # in ticks */ uint32_t fifo_time; /* empty and <1/2 full # */ int saved_instance; /* for future ref & error logging */ uint32_t dev_and_vendor_id; /* device and vendor id from config regs */ u_char revision_id; /* revision id from config regs */ u_char int_level; /* saved assigned interrupt level */ u_int vers_speed_def; /* default versatec speed selection */ u_int cent_speed_def; /* centronics default speed selection */ u_int mode_def; /* default print/plot mode */ u_int dma_time_def; /* dma timeout default in seconds */ u_int rdy_time_def; /* ready wait timeout default in secs */ } ihcp_unit_t; /* isc pointer linked list structure */ typedef struct ihcp_isc_list { struct isc_table_type *isc_p; struct ihcp_isc_list *next_link; } ihcp_isc_list_t;