/* ihcp_var.h hp-ux driver for pci hardcopy board - model 10117 soft state structure definition Ikon Corporation 2617 Western Avenue Seattle, WA USA 98121 phone: 206.728.6465 fax: 206.728.1633 www: http://www.launchsite.com/ikon */ /* THIS CODE IS OFFERED TO IKON'S CUSTOMERS AT NO CHARGE, WITH THE INTENT THAT IT BE USED WITH IKON'S BOARD LEVEL PRODUCTS. WHILE IKON INTENDS TO KEEP THE DRIVER CURRENT WITH HP'S HARDWARE AND OPERATING SYSTEMS, AND TO KEEP THE CODE AS BUG FREE AS POSSIBLE, THIS IS NOT GUARANTEED. 10 November, 1997 initial coding strategy uses a combination of p-i/o for leading & trailing bytes, and dma for long word blocks dma chaining is supported */ /* unit structure for boards */ typedef struct { int slot; /* our slot # - used in debug printfs */ struct isc_table_type *isc; /* saved ics ptr for future reference */ caddr_t plx_mapped_base; /* points at mapped plx regs */ caddr_t ihcp_mapped_base; /* points at mapped ihcp regs */ caddr_t iopb_base; /* virtual address of io control blocks*/ u_long iopb_phys_base_addr; /* pci address of io control blocks */ lock_t *spinlock; /* pointer for use in spinlocking */ int sleepevent; /* used by get_sleep_lock and sleep */ struct buf *buf_p; /* will point at buffer in use */ volatile u_int unit_open; /* 1 = open */ volatile u_int unit_attached; /* 1 = attached */ u_long mode; /* copy of print/plot mode */ u_long data_stream_mode; /* copy of data streaming mode */ u_long byte_order; /* big or little endian data flag */ volatile u_long unit_flags; /* our flag bits here */ u_long dma_time; /* dma timeout # in ticks */ u_long fifo_time; /* empty and <1/2 full # */ int saved_instance; /* for future ref & error logging */ u_long dev_and_vendor_id; /* device and vendor id from config regs */ u_char revision_id; /* revision id from config regs */ u_int vers_speed_def; /* default versatec speed selection */ u_int cent_speed_def; /* centronics default speed selection */ u_int mode_def; /* default print/plot mode */ u_int dma_time_def; /* dma timeout default in seconds */ u_int rdy_time_def; /* ready wait timeout default in secs */ } ihcp_unit_t;